Microprocessors and Microcontrollers (3160914) MCQs

MCQs of 8051 Microcontroller Architecture

Showing 61 to 70 out of 89 Questions
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61.

By setting 1-0 in RS0 and RS1 bit in PSW which register is selected?

(a)

Register bank 0
(b)

Register bank 1
(c)

Register bank 2
(d)

Register bank 3
Answer:

Option (c)

62.

By setting 1-1 in RS0 and RS1 bit in PSW which register is selected?

(a)

Register bank 0
(b)

Register bank 1
(c)

Register bank 2
(d)

Register bank 3
Answer:

Option (d)

63.

The function of RS0 and RS1 bit of 8051 is for _______

(a)

Register bank Select
(b)

Memory Select
(c)

I/O select
(d)

None of the above
Answer:

Option (a)

64.

Address of Register bank 0 is _______

(a)

00H-06H
(b)

00H-007H
(c)

08H-0FH
(d)

10H-1FH
Answer:

Option (b)

65.

Adress of Register Bank 1 is _________

(a)

08H-0FH
(b)

07H-09H
(c)

10H-1FH
(d)

18H-1FH
Answer:

Option (a)

66.

Adress of register bank 2 

(a)

11H-17H
(b)

18H-10H
(c)

10H-17H
(d)

1FH-2FH
Answer:

Option (c)

67.

Adress of Register bank 3

(a)

10H-18H
(b)

11H-16H
(c)

16H-17H
(d)

18H-1FH
Answer:

Option (d)

68.

The register that can be used as a scratch pad is

(a)

Accumulator
(b)

B register
(c)

Data register
(d)

Accumulator and B register
Answer:

Option (b)

69.

The registers that contain the status information is

(a)

control registers
(b)

instruction registers
(c)

program status word
(d)

all of the mentioned
Answer:

Option (c)

70.

The architecture of 8051 consists of

(a)

4 latches
(b)

2 timer registers
(c)

4 on-chip I/O ports
(d)

all of the mentioned
Answer:

Option (d)

Showing 61 to 70 out of 89 Questions
4 5 6 7 8 9