Computer Organization & Architecture (3140707) MCQs

MCQs of Memory Organization

Showing 31 to 40 out of 45 Questions
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31.
The performance of cache memory is frequently measured in _________.
(a) access ratio
(b) number of hits
(c) hit ratio
(d) transfer rate
Answer:

Option (c)

32.
When the CPU refers to memory and finds the word in cache, it is said to produce _______.
(a) miss
(b) fail
(c) pass
(d) hit
Answer:

Option (d)

33.
If the word is not found in cache, it is in main memory and it counts as ______.
(a) fail
(b) miss
(c) slip
(d) pass
Answer:

Option (b)

34.
Hit ratio of cache memory defined as?
(a) number of hits divided by total of hits plus misses
(b) number of hits divided by number of misses
(c) total of hits plus misses divided by number of hits
(d) number of misses divided by number of hits
Answer:

Option (a)

35.
The transformation of data from main memory to cache memory is referred to as a _________.
(a) transfer rate
(b) access time
(c) mapping process
(d) none of above
Answer:

Option (c)

36.
Which of the following is not a valid mapping process for the organization of cache memory?
(a) Direct-associative
(b) Associative mapping
(c) Set-associative mapping
(d) Direct mapping
Answer:

Option (a)

37.
The main memory is 4K x 9 and cache memory is 256 X 9 in associative mapping. What is the size of argument register?
(a) 9 bits
(b) 12 bits
(c) 6 bits
(d) 10 bits
Answer:

Option (b)

38.
The main memory is 4K x 9 and cache memory is 256 X 9 in associative mapping. How many octal digits are required to express data?
(a) 6
(b) 4
(c) 9
(d) 3
Answer:

Option (d)

39.
In direct mapping cache organization, the CPU address is divided into which two fields?
(a) Index, Code
(b) Sequence, Tag
(c) Index, Tag
(d) None of above
Answer:

Option (c)

40.
The main memory is 4K x 9 and cache memory is 512 X 9 in direct mapping. Index field of cache memory is _____.
(a) 9 bits
(b) 6 bits
(c) 3 bits
(d) 12 bits
Answer:

Option (a)

Showing 31 to 40 out of 45 Questions
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